Why do only three companies make DRAM?
DRAM is dense, cheap to print, and impossible to repurpose a logic fab into. The world has SK Hynix, Samsung, and Micron, and they are sold out.
DRAM capacity cannot expand inside a current cycle. The clean rooms are different from logic fabs, and new fabs take years to build. When AI demand spikes, the price goes up before the supply moves.
One transistor, one capacitor
A DRAM cell stores each bit as charge on a tiny capacitor, gated by a single transistor. The capacitor leaks, so the chip has to refresh every row every few milliseconds.
The cell is far smaller than an SRAM cell, so density is high. The penalty is access time and the need for a refresh schedule that competes with real reads and writes.
A DRAM fab is not a logic fab
A logic process is tuned for fast switching, low leakage, and tight design rules around transistors. A DRAM process is tuned for tall capacitor trenches, very low leakage, and high yield on densely repeating cells.
You cannot reallocate a logic line into a DRAM line. The equipment, materials, and process flow are different. That is why the answer to "Samsung has empty logic fabs, why not pivot to memory" is no.
Source: Irrational Analysis interview, Chris Barber, May 2026
Three vendors, sold out
There are three companies on the planet that produce frontier DRAM: SK Hynix, Samsung Memory, and Micron. All three are running at high utilisation and selling product at around 80 percent gross margins.
For AI buyers, that means the question is not who has the best part. It is who has any allocation at all in the next quarter.
Source: Irrational Analysis interview, Chris Barber, May 2026
DRAM and HBM are the same business
HBM is stacked DRAM dies with a logic base die underneath. Every HBM stack consumes DRAM die area in the same fabs. When HBM ramps, regular DDR availability tightens, and the price of all memory rises together.
Treating HBM and DRAM as separate markets misses the point. They share clean rooms. The commodity LPDDR that NVIDIA can right-size by swapping SOCAMM modules draws from this same pool — which is why a CPU-memory configuration change can move all three vendors' stocks in a morning.
Strategic read
Memory is the second-worst AI bottleneck right now after indium phosphide, and the slowest to fix. A new memory fab is a multi-year, multi-billion-dollar build.
For Pere, the read is that any AI build-out forecast that does not include a DRAM capacity model is missing one of the binding constraints.